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| CT T ODU MEN E PR PLACE -7747 Semiconductor ET OL RE -442 OBS ENDED -800 M ns 1 rris.com M io licat ECO ha NO R ntral App entapp@ c e C : Call or email CMOS 4 x 4 Crosspoint February 1999 CD22100 Switch with Control Memory High-Voltage Type (20V Rating) Features * Low ON Resistance . . . . . . . . . .75 (Typ) at VDD = 12V Description CD22100 combines a 4 x 4 array of crosspoints (transmission gates) with a 4-line to 16-line decoder and 16 latch circuits. Any one of the sixteen transmission gates (crosspoints) can be selected by applying the appropriate four line address. The selected transmission gate can be turned on or off by applying a logic one or zero, respectively, to the data input and strobing the strobe input to a logic one. Any number of the transmission gates can be ON simultaneously. When the required operating power is applied to the CD22100, the states of the 16 switches are indeterminate. Therefore, all switches must be turned off by putting the strobe high and data in low, and then addressing all switches in succession. [ /Title (CD22 100) /Subject CMO 4x4 rossoint witch ith onrol emry igholtge ype 20V atng)) / Author () /Keyords Haris emionuctor, eleom, LICs, LACs Telehone, * "Built-In" Control Latches * Large Analog Signal Capability . . . . . . . . . . . . . . . VDD/2 * 10MHz Switch Bandwidth * Matched Switch Characteristics RON = 18 (Typ) at VDD = 12V * High Linearity - 0.5% Distortion (Typ) at f = 1kHz, VIN = 5VP-P, VDD = 10V, and RL = 1k * Standard CMOS Noise Immunity * 100% Tested for Maximum Quiescent Current at 20V Ordering Information PART NUMBER CD22100E CD22100F TEMP. RANGE (oC) -40 to 85 -55 to 125 PACKAGE 16 Ld PDIP 16 Ld CERDIP PKG. NO. E16.3 F16.3 Pinout CD22100 (PDIP, CERDIP) TOP VIEW 1 2 3 4 5 6 7 8 16 VDD Functional Diagram STROBE 7 DATA IN 2 0 1 2 3 15 Y1 X2 DATA IN C D B A STROBE VSS 4-LINE TO 16-LINE DECODER 15 Y1 14 Y2 13 X4 ADDRESS 12 X3 11 Y4 10 Y3 9 X1 6 A 16 CONTROL LATCHES 4 5 6 7 14 Y2 5 B 10 8 9 10 11 Y3 3 C 12 13 14 15 11 Y4 4 D 9 X1 1 X2 12 X3 13 X4 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright (c) Harris Corporation 1999 File Number 1076.4 4-184 CD22100 Absolute Maximum Ratings Supply Voltage (Referenced to VSS Terminal) . . . . . . . . .-0.5 to 20V Input Voltage (All Inputs) . . . . . . . . . . . . . . . . . . . . -0.5 to VDD 0.5V Input Current (Any one input (Note 1)) . . . . . . . . . . . . . . . . . . . .10mA Power Dissipation For TA = -40oC to 60oC (Package Type E) . . . . . . . . . . . . 500mW For TA = 60oC to 85oC (Package Type E) . . . . . . . . Derate Linearly 12mW/oC to 200mW For TA = -55oC to 100oC (Package Type F) . . . . . . . . . . . 500mW For TA = 100oC to 125oC (Package Type F) . . . . . . . . Derate Linearly 12mW/oC to 200mW Device Dissipation per Transmission Gate For TA = Full Package Temperature Range (All Types) . . . . . 100mW Thermal Information Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Storage Temperature Range . . . . . . . . . . . . . . . -65oC TA 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC Operating Conditions Temperature Range Package Type F . . . . . . . . . . . . . . . . . . . . . . . -55oC TA 125oC Package Type E . . . . . . . . . . . . . . . . . . . . . . . . -40oC TA 85oC Supply Voltage Range For TA = Full Package Temperature Range . . . . . . . . . . . . . . 3V to 18V CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications Values at -55oC, 25oC, 125oC Apply to F Package Values at -40oC, 25oC, 85oC Apply to E Package TEST CONDITIONS -55oC VDD (V) MAX -40oC MAX 85oC MAX 125oC MAX MIN 25oC TYP MAX UNITS A A A A nA PARAMETER STATIC CROSSPOINTS Quiescent Device Current SYMBOL FIG. IDD (Max) 1 1 1 1 5 10 15 20 5 10 12 15 5 10 12 15 18 5 10 20 100 475 135 100 70 100 5 10 20 100 500 145 110 75 - 150 300 600 3000 725 205 155 110 - 150 300 600 3000 800 230 175 125 - - 0.04 0.04 0.04 0.08 225 85 75 65 25 10 8 5 1 5 10 20 100 600 180 135 95 100 (Note 2) On Resistance RON (Max) Any Switch VIS = 0 to VDD 11 12 13 RON Resistance RON Between any two switches - OFF Switch Leakage Current STATIC CONTROLS Input Low Voltage IL (Max) All switches OFF, VIS = 18V 3 1000 VIL (Max) OFF switch IL < 0.2A - 5 10 15 5 10 15 18 0.1 0.1 1.5 3 4 3.5 7 11 1 1 3.5 7 11 - 10-5 1.5 3 4 0.1 V V V V V V A Input High Voltage VIH (Min) ON switch see RON characteristic IIN (Max) Any control VIN = 0, 18V - Input Current NOTES: 2 1. Maximum current through transmission gates (switches) = 25mA. 2. Determined by minimum feasible leakage measurement for automatic testing. 4-185 CD22100 Electrical Specifications TA = 25oC TEST CONDITIONS PARAMETER DYNAMIC CROSSPOINTS Propagation Delay Time, (Switch ON) Signal Input to Output tPHL, tPLH 5 10 5 10 15 CL = 50pF; tR , tF = 20ns Frequency Response (Any Switch ON) f3dB 16 1 1 5 10 40 MHz 5 10 15 30 15 10 60 30 20 ns ns ns SYMBOL FIGURE fIS (kHz) RL (k) VIS (V) (Note 3) VDD (V) MIN TYP MAX UNITS V OS Sine Wave Input, 20 log ----------- = -3dB V IS THD FDT 1 1.6 1 1 5 5 10 10 0.5 -80 % dB Sine Wave Response (Distortion) Feedthrough (All switches OFF) Sine Wave Input Frequency for Signal Crosstalk Attenuation of 40dB Attenuation of 110dB Capacitance: Xn to Ground Yn to Ground Feedthrough DYNAMIC CONTROLS Propagation Delay Time: Strobe to Output (Switch Turn-ON to High Level) Propagation Delay Time: Data-In to Output (Turn-ON to High Level) Propagation Delay Time: Address to Output (Turn-ON to High Level) Propagation Delay Time: Strobe to Output (Switch Turn-OFF) Propagation Delay Time: Data-In to Output (Turn-ON to Low Level) Propagation Delay Time: Address to Output (Turn-OFF) tPHZ 10 tPZL 9 tPHZ 8 tPZH 10 tPZH 9 tPZH 8 RL = 1k, CL = 50pF, tR , tF = 20ns 5 10 15 RL = 1k, CL = 50pF, tR , tF = 20ns RL = 1k, CL = 50pF, tR , tF = 20ns RL = 1k, CL = 50pF, tR , tF = 20ns RL = 1k, CL = 50pF, tR , tF = 20ns RL = 1k, CL = 50pF, tR , tF = 20ns 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 300 125 80 110 40 25 350 135 90 165 85 70 210 110 100 435 210 160 600 250 160 220 80 50 700 270 180 330 170 140 420 220 200 870 420 320 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns CIOS CIS 5 - 15 5 - 15 18 30 0.4 pF pF pF FCT 7 1 10 10 1.5 0.1 MHz kHz Sine Wave Input - 4-186 CD22100 Electrical Specifications TA = 25oC (Continued) TEST CONDITIONS PARAMETER Minimum Setup Time Data-In to Strobe, Address SYMBOL FIGURE tS 8, 10 fIS (kHz) RL (k) VIS (V) (Note 3) VDD (V) 5 10 15 Minimum Hold Time Data-In to Strobe, Address tH 8, 10 RL = 1k, CL = 50pF, tR, tF = 20ns RL = 1k, CL = 50pF, tR, tF = 20ns 8 5 10 15 Maximum Switching Frequency fO 5 10 15 Minimum Strobe Pulse Width tW 5 10 15 Control Crosstalk, Data-In, Address or Strobe to Output 6 Input Capacitance NOTE: CIN Square Wave Input; tR, tF = 20ns 10 Any Control Input 10 5 7.5 pF 10 MIN 0.6 1.6 2.5 TYP 95 25 15 180 110 35 1.2 3.2 5 300 120 90 75 MAX 190 50 30 360 220 70 600 240 180 UNITS ns ns ns ns ns ns MHz MHz MHz ns ns ns mVPEAK RL = 1k, CL = 50pF, tR, tF = 20ns V DD 3. Peak-to-peak voltage symmetrical about ------------ . 2 4-187 CD22100 Schematic Diagram 16 VDD (NOTE) 6 A A A (1 OF 16) A B C D DQ TG 0 1 2 3 14 Y2 TG 4 5 6 7 10 Y3 (NOTE) 3 C C C D DETAIL OF LATCHES TG 8 9 10 11 Q 11 Y4 TG 12 13 14 15 9 X1 X2 1 12 X3 13 X4 TG TG TG TG TG TG TG TG TG TG TG TG Y1 (NOTE) STROBE 7 (NOTE) DATA IN 2 15 o o o=1 (NOTE) 5 B B B ENABLES DATA LATCH TO OTHER DECODER GATES/LATCHES o p n (NOTE) 4 D o D D o p n o LEVEL TRIGGERED 8 VSS VDD DETAIL OF TRANSMISSION GATES VDD IN VDD NOTE: INPUTS PROTECTED BY COS/MOS PROTECTION NETWORK Q VSS OUT VSS TRUTH TABLE ADDRESS A 0 1 0 1 0 1 0 1 B 0 0 1 1 0 0 1 1 C 0 0 0 0 1 1 1 1 D 0 0 0 0 0 0 0 0 SELECT X1Y1 X2Y1 X3Y1 X4Y1 X1Y2 X2Y2 X3Y2 X4Y2 A 0 1 0 1 0 1 0 1 ADDRESS B 0 0 1 1 0 0 1 1 C 0 0 0 0 1 1 1 1 D 1 1 1 1 1 1 1 1 SELECT X1Y3 X2Y3 X3Y3 X4Y3 X1Y4 X2Y4 X3Y4 X4Y4 4-188 CD22100 Metallization Mask Layout Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). Test Circuits and Waveforms VDD VDD 1 2 VSS 3 4 5 6 7 VSS 8 16 15 14 13 12 11 10 9 VSS VSS IDD II VDD 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 NOTE: MEASURE INPUTS SEQUENTIALLY TO BOTH VDD AND VSS CONNECT ALL UNUSED INPUTS TO EITHER VDD OR VSS VDD FIGURE 1. QUIESCENT CURRENT TEST CIRCUIT FIGURE 2. INPUT CURRENT TEST CIRCUIT 4-189 CD22100 Test Circuits and Waveforms (Continued) VDD IDD 1 2 3 4 5 6 7 8 VSS 16 15 14 13 12 11 10 9 VDD FIGURE 3. OFF SWITCH INPUT OR OUTPUT LEAKAGE CURRENT TEST CIRCUIT VDD 500F ID 0.1F 105 POWER DISSIPATION PER PACKAGE (W) TA = 25oC VDD = 15V 10V 10V 1 2 CD4029 CLK Q3 Q4 Q2 Q1 3 4 5 6 7 8 VSS NOTE: CLOSE SWITCH S AFTER APPLYING VDD 16 15 14 13 12 11 10 9 S 104 CL CL CLK 103 5V 102 CL = 50pF CL = 15pF 10 102 103 104 105 106 SWITCHING FREQUENCY (Hz) CL CL FIGURE 4. DYNAMIC POWER DISSIPATION TEST CIRCUIT AND TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF SWITCHING FREQUENCY ON VIS SW 10k SW = ANY CROSSPOINT STROBE = DATA - IN = VDD VDD VIS 50% 0 tPLH VDD VOS 50% 0 50% tPLH 50% VOS 50mV 0 -50mV CONTROL 0 SW = ANY CROSSPOINT VDD VOS 50pF VIS 1k SW VOS 10k CONTROLS FIGURE 5. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS (SIGNAL INPUT TO SIGNAL OUTPUT, SWITCH ON) FIGURE 6. TEST CIRCUIT AND WAVEFORMS FOR CROSSTALK (CONTROL INPUT TO SIGNAL OUTPUT) 4-190 CD22100 Test Circuits and Waveforms (Continued) 0 -20 V OS 20 log ---------- = dB V IS TA = 25oC VDD = 10V VIS = 10VP-P SINE WAVE -40 CL = 50pF RL = 1k ON VIS 1k SW 1k OFF SW SW = ANY CROSSPOINT 1k VOS -60 CROSSTALK -80 -100 -120 102 103 104 105 106 INPUT SIGNAL FREQUENCY (Hz) FIGURE 7. TEST CIRCUIT AND TYPICAL CROSSTALK BETWEEN SWITCH CIRCUITS IN THE SAME PACKAGE AS A FUNCTON OF SIGNAL FREQUENCY tW DATA-IN STROBE VDD VIS SW 1k SW = ANY CROSSPOINT VOS 50pF VOS 0 tPHZ DATA-IN STROBE VDD 50% 0 tS VDD 0 tPZH VDD 90% 10% tH tS tH 50% 50% 50% tW FIGURE 8. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS (STROBE TO SIGNAL OUTPUT, SWITCH TURN-ON OR TURN-OFF) DATA-IN VDD VDD VIS SW 1k SW = ANY CROSSPOINT STROBE = VDD VOS VDD 50pF VOS 0 10% DATA-IN 0 tPZH VIS SW 50% VDD VDD DATA-IN 1k VOS 50pF 0 tPZH VDD VOS 0 90% 50% FIGURE 9. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS (DATA-IN TO SIGNAL OUTPUT, SWITCH TURN-ON TO HIGH OR LOW LEVEL) 4-191 CD22100 Test Circuits and Waveforms ADDRESS = 0 (Continued) VDD ADDRESS = 1 ADDRESS 0 tS VDD VIS SW VOS1 VIS VDD DATA-IN SW VOS2 0 tH VDD 50% 50% 50% tPHZ VDD VOS1 1k 50pF 1k 50pF VOS2 0 0 VDD SW = ANY CROSSPOINT STROBE = VDD 90% tPZH 10% FIGURE 10. PROPAGATION DELAY TIME TEST CIRCUIT AND WAVEFORMS (ADDRESS TO SIGNAL OUTPUT, SWITCH TURN-ON OR TURN-OFF) Typical Performance Curves VDD = 2.5V, VSS = -2.5V SWITCH "ON" RESISTANCE () SWITCH "ON" RESISTANCE () VDD = 5V, VSS = -5V 300 250 200 150 100 50 0 -4 -3 -2 -1 0 1 2 3 4 INPUT SIGNAL (V) 25oC 150 125 100 25oC 75 50 25 0 -10 -7.5 -5 -2.5 0 2.5 5 7.5 10 INPUT SIGNAL (V) -55oC TA = 125oC TA = 125oC -55oC FIGURE 11. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT VDD = -VSS = 2.5V FIGURE 12. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT VDD = -VSS = 5V 4-192 CD22100 Typical Performance Curves VDD = 7.5V, VSS = -7.5V (Continued) TA = 25oC 150 SWITCH "ON" RESISTANCE () SWITCH "ON" RESISTANCE () 125 100 75 25oC 50 -55oC 25 0 -10 -7.5 -5 -2.5 0 2.5 5 7.5 10 INPUT SIGNAL (V) 300 250 200 150 100 5V 50 0 -10 -7.5 -5 -2.5 0 2.5 5 7.5 10 INPUT SIGNAL (V) 7.5V VDD = 2.5V, VSS = -2.5V TA = 125oC FIGURE 13. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT VDD = -VSS = 7.5V FIGURE 14. TYPICAL ON RESISTANCE AS A FUNCTION OF INPUT SIGNAL VOLTAGE AT TA = 25oC TA = 25oC, VDD = 5V, VSS = -5V VIS = 5VP-P = SINE WAVE 1.77VRMS CL = 15pF VDATA-IN = 5V RL = 1M 2 1.5 1 0.5 0 105 106 107 108 INPUT SIGNAL FREQUENCY (Hz) RF VOLTMETER BOONTON RADIO MODEL 91-CA OR EQUIVALENT 10k fIS VIS SW RL CL CIOS = 0.4pF VOS (RMS) VDD = 10V TA = 25oC 10 OUTPUT VOLTAGE (V) 8 500 6 4 SW VIS 2 1k STROBE = VDD DATA-IN = VDD VOS RL VSS 0 2 4 6 8 10 OUTPUT SIGNAL (VOS) RMS (V) RL = 1M, 100k, 10k 2.5 1k INPUT VOLTAGE (V) FIGURE 15. TYPICAL SWITCH ON TRANSFER CHARACTERISTICS (1 OF 16 SWITCHES) FIGURE 16. TYPICAL SWITCH ON FREQUENCY RESPONSE CHARACTERISTICS 4-193 |
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